All-fet linear voltage difference amplifier

ABSTRACT

A linear voltage difference amplifier circuit which utilizes a plurality of field-effect devices having substantially identical operating characteristics. The devices are connected in a series arrangement with the source electrode of each device coupled to the drain electrode of its adjacent device. Each of the devices except a first and a second of the devices has its gate electrode coupled to its drain electrode. Input terminals are coupled to the gate electrodes of the first and second devices and an output terminal is coupled to the drain electrode of one of the devices. In one embodiment of the invention the amplifier consists of three devices and the output voltage is equal to the voltage applied to the first input terminal minus twice the voltage applied to the second input terminal.

United States Patent Greene [54] ALL-FET LINEAR VOLTAGE DIFFERENCE AMPLIFIER 1 May 16,1972

OTHER PUBLlCATlONS Lohman, Applications of Mos Pets in Microelectronics," SCP and Solid'State Technology, March 1966, pp. 23- 29, 307- 304 Primary Examiner-Roy Lake Assistant Examiner-James B. Mullins Attorney-Irving M. Kriegsman 57 ABSTRACT A linear voltage difierence amplifier circuit which utilizes a plurality of field-efiect devices having substantially identical operating characteristics. The devices are connected in a series arrangement with the source electrode of each device coupled to the drain electrode of its adjacent device. Each of the devices except a first and a second of the devices has its gate electrode coupled to its drain electrode. lnput terminals are coupled to the gate electrodes of the first and second devices and an output terminal is coupled to the drain electrode of one of the devices. In one embodiment of the invention the amplifier consists of three devices and the output voltage is equal to the voltage applied to the first input terminal minus twice the voltage applied to the second input terminal.

6 Claims, 10 Drawing Figures PATENTEDMAYISIQTZ 3.663.888

sum 10F 3 v d M 4 PRIOR ART h n Fig.

v VB

I 3. Fig 4 aHII Ill e3- fiz VB l e ()--||:Q e2 IL INVENTOR.

RICHARD GREENE ATTORNEY connected to the drain electrode d of Q The output voltage of the amplifier, e is taken at this connection point. A bias voltage V is applied between the drain electrode of Q and source electrode of O which is at ground reference potential. The substrate of each MOSFET (not shown) is at ground potential as is the normal practice for devices fabricated on the same substrate. The input voltage e is applied to the gate electrode 3 of O The devices Q and O both operate in their saturation regions which operation is attained by applying an appropriate bias voltage V to the gate electrode of Q, and by constraining e to an appropriate range of voltages.

With both MOSFETS opc .ating in saturation, the following relationships can be set forth:

i is the drain-to-source current of Q K is the gain constant of Q,

V, is the threshold voltage of Q V is the gate-to-source voltage of Q i is the drain-to-source current of Q K D is the gain constant of Q V is the threshold voltage of Q,,, and

V is the gate-to-source voltage for Q,,.

It can be seen by inspection that V V e and that V e Since there is no appreciable gate current for either device the currents i, and i are substantially equal and can be equated and solved to yield the followin 1/ (KB/KL) m VBL n r.) uln thL Differentiating this equation yields the circuit voltage gain as follows:

a/ e in V KD/Kl.

From this gain equation it is seen that for identical Q and O a voltage gain of 1 is obtained. In this case the amplifier is thermally stable since the terms in the equation for e, which depend upon threshold voltage cancel. However, to achieve a voltage gain having a magnitude other than unity with this circuit configuration it is necessary to utilize a pair of non-identical devices having different gain constants.

The gain constant of a MOSFET can be represented by the general formula K ue W/2t,,S) where:

u is the carrier mobility in the semiconductor material 6,, is the dielectric constant of gate insulation W is the width of the device channel S is the length of the device channel and t, is the thickness of the gate insulation.

When the devices Q and Q are fabricated in close proximity on the same substrate, the values of u, e, and t, are generally the same for each device. Variations in the geometrical factors W and S are therefore used to achieve the desired gain. For example, a voltage gain of 2 can be achieved by making the width of the driver MOSFET channel (W four times as large as the width of the load MOSFET channel (W while keeping other parameters identical. In this case it is seen that the voltage gain reduces to 1/ (W /W which equals the desired value of 2. The above equation for e, indicates, though, that this amplifier would not be thermally stable as the terms V (Kn/KL) V .1, and VW, would generally change by different amounts with changes in temperature.

Referring now to FIG. 2 there is shown a linear voltage difference amplifier circuit in accordance with the invention. Field-effect transistors Q Q and Q have substantially identical operating characteristics and are connected in a series arrangement with the drain electrode of Q coupled to the source electrode of Q and the drain electrode of 0 coupled to the source electrode of Q The transistors of FIG. 2 and subsequent embodiments are each depicted as MOSFETS but the invention applies generally to all field-efi'ect devices which exhibit square law characteristics. The source electrode of Q is coupled to ground reference potential and the drain electrode of Q is coupled to a bias voltage V,. (All voltages are measured wit respect to ground potential.) The gate electrode of O is coupled to its drain electrode. Input voltages e and e;, are applied to the gate electrodes of Q and Q respectively, and an output voltage e is measured at the drain electrode of Q For linear operation of the difference amplifier the field-effect devices should operate in their saturation regions so that each device exhibits square law characteristics. In general, a MOSFET will operate in its saturation region whenever V V V V where V and V, are the drain-to-source and gate-to-source voltages of the device and V is the threshold voltage of the device. It is seen that Q will therefore operate in saturation since for this device V equals V and the above condition is met. In addition, by limiting the input voltages to ranges of values V,, e, s ((e +V,,,)/3) and 3V e3 5 V V the transistors Q and Q, are also constrained to operation in their saturation regions.

The drain current in each device of amplifier 20 is substantially equal since virtually no gate current flows in the MOSFET devices. With each device operating in the saturatior. region, the following square-law relationships (assuming negligible drain-to-source saturation leakage) are in effect:

D K( eal VIII) 2 t) K( V083 III) 2 where:

i,, is the drain current through each device,

K is the gain constant of each device,

V is the threshold voltage of each device, and

V V V are the gate-to-source voltages of Q Q 0;, respectively.

It should be noted that the values of K and V for each device are the same since substantially identical devices are being used. This is preferably achieved in practice by fabricating the devices in close proximity on the same semiconductor wafer. The above relationships are simultaneously satisfied only if V V V Since V, e,, it is seen that V m =e,. The voltage drop across the series arrangement can be expressed by the equation B d81 ds2 dx3 (I) ,where V V and V are the drain-to-source voltages of Q Q and Q respectively. Noting that V e and V V e,, Equation l can be rewritten as nut H' 1 ds3 2) The voltages associated with Q, can be expressed by the equation VB alli a V033 Since V =e Equation (3) can be rewritten as Substituting the value of V from Equation (4) in Equation (2) yields oul emil 6e 2and 6e It is therefore seen that the circuit produces gains of 2 and l with respect to the two inputs. This is achieved using three substantially identical field-effect devices. The circuit is thermally stable since the equation for e does not depend upon threshold voltages which vary with temperature.

The output voltage of difference amplifier 20 as derived from the above equations can be alternatively visualized by keeping in mind that with the devices operating in saturation the gate-to-source voltages of Q and 0 must track" the voltage e This being the case, the voltage at the source electrode of 0 must be e; e,. Note that this is also the voltage at the gate electrode of Q It follows that the voltage at the source electrode of Q (i.e., e must equal e 2e for the tracking constraint to be met.

The foregoing analyses can be similarly applied to the voltage difference amplifiers shown in FIGS. 3 and 4. The amplifier 30 of FIG. 3 is like the previous amplifier 20 except that input terminals are coupled to the gate electrodes of Q and Q and the gate electrode of O is coupled to its drain electrode.

ALL-F ET LINEAR VOLTAGE DIFFERENCE AMPLIFIER BACKGROUND OF THE INVENTION This invention relates to difference amplifier circuits and, more particularly, to an all-FET linear voltage difference amplifier circuit.

In designing integrated circuits a common objective is to minimize the use of passive components such as resistors, which require relatively large surface areas, while maximizing the use of active components which are usually significantly smaller. This is one reason that the field-effect transistor (FET), and especially the insulated gate field-effect transistor (IGFET), has become a widely used active component for integrated circuits.

A FET consists of a substrate of semiconductor material having regions therein denoted as source and drain. A carrier conduction channel lies between these regions and the conductance of this channel is controlled by an electric field. In an insulated-gate field-effect transistor (IGFET) a control electrode known as a gate" overlies the channel and is separated therefrom by a region of insulating material. Voltages applied between the gate electrode and the semiconductor substrate control the conductance of the channel by field effect. A metal-oxide-semiconductor field-effect transistor" (MOSFET) is a type of IGFET in which the insulating material is an oxide layer and the gate is an overlying metal layer. The MOSFET generally requires less surface area and fewer manufacturing steps than the conventional bipolar transistor.

A voltage amplifier which utilizes a PET in series with a fixed load resistor produces an output voltage which varies as a nonlinear function of the input voltage. This nonlinearity is due to the nonlinear transfer characteristic of a FET device which, when operated in its saturation region, exhibits square law" gain characteristics. This means that the drain-to-source current through the device varies as the square of the gate voltage applied to the device. To achieve a linear output it has been suggested that a second FET (a load FET") be employed in place of the fixed load resistor. With this scheme, the load FET is coupled in series with the first mentioned FET (called the driver FET") so that the same drain-to-source current flows through each device. Since both devices have substantially square law" characteristics their nonlinear characteristics offset each other and a linear output voltage is obtained. As will be demonstrated below, a voltage gain having unity magnitude is obtainable from such a linear amplifier when two identical FET devices are employed. To obtain a non-unity gain from this circuit it is necessary to employ two FET devices having different individual gain constants. This can be achieved by utilizing devices of differing geometries. For example, as will be seen below, by using a driver MOSFET which has a channel width four times greater than that of a load MOSFET a gain magnitude of two can be obtained.

There are disadvantages, however, in using devices of differing geometries to make a voltage amplifier, especially in integrated circuit technology. From a manufacturing standpoint it is easier and therefore more desirable to fabricate a number of identical devices on a substrate. Furthermore, when devices of different geometries are fabricated on the same substrate manufacturing errors tend to degrade performance of a circuit using such devices more than if identical devices had been used. To illustrate, it can be noted that with identical devices an error in a manufacturing step will likely lead to consistent errors," i.e., equivalent parameter deviations in each device. For example, if a given dimension of each device is in error by a fixed amount each device will have a certain percentage error in performance, but the devices will still be substantially identical. With non-identical devices, however, such errors tend to affect the individual devices in different ways. For example, if a dimension of each device is in error by a given amount there will likely be a largest percentage error in the performance of the device of smallest geometry.

An additional disadvantage in using devices of differing geometries is the lack of thermal stability of the voltage amplifier. As will be seen below, the expression for the output voltage of the two-device amplifier previously described contains terms for the threshold voltage of each device. When identical devices are used, these threshold voltage terms cancel out. When non-identical devices are used, the output voltage is affected by unlike variations in the threshold voltages of the two devices. Therefore, since threshold voltage is temperature dependent, variations in temperature will cause an undesirable drifting of the amplifier output voltage.

The circuit of the instant invention utilizes a number of identical devices and achieves gains other than unity without sacrificing temperature stability. Also, the gain of the disclosed circuit is not substantially affected by like dimensional variations in each device as often occurs in integrated circuit manufacture. The circuit is therefore particularly suitable for fabrication in integrated circuit form.

A circuit which also utilizes a number of identical FET devices and achieves non-unity gain is disclosed in my copending U. S. application Ser. No. 11,599 filed Feb. 16, 1970 assigned to the same assignee as the present invention. In the circuit of the referenced application a single input voltage is received and amplified. The circuit of the present invention is adapted to receive two input voltages and produce various forms of difference voltages as between the two input voltages.

SUMMARY OF THE INVENTION The present invention is directed to a voltage difference amplifier which includes a plurality of at least three field-effect transistor devices having substantially identical operating characteristics. The devices are connected in a series arrangement with the source electrode of each device coupled to the drain electrode of the next device in the arrangement. The source electrode of the device at one end of the series arrangement and the drain electrode of the device at the other end of the arrangement define the source end and the drain end," respectively, of the series arrangement. Each of the devices except a first and second of said devices has its gate electrode coupled to its drain electrode. First and second input terminals are coupled to the gate electrodes of the first and second devices, respectively. Means are provided for applying a bias voltage between the drain end and the source end of the series arrangement. In addition, an output terminal is coupled to the drain electrode of one of the devices.

The output voltage of the disclosed difference amplifier circuit depends upon the number of devices in the arrangement and also upon the positions of the input and output terminals.

In a preferred embodiment of the invention the arrangement consists of three devices and the first and second devices are at the drain end and source end, respectively, of the arrangement. The output terminal is coupled to the drain electrode of the second device. In this embodiment the output voltage is equal to the voltage applied to the first input terminal minus twice the voltage applied to the second input terminal.

Further features and advantages of the invention will become more readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a prior art amplifier circuit. FIGS. 2-10 are schematic circuit diagrams of embodiments of the invention.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Before describing the present invention in detail, it will be helpful to understand the functioning of a prior art linear amplifier which utilizes two series connected MOSFETS. FIG. 1 shows an amplifier circuit 10 consisting of a driver transistor" O and a load transistor" Q The devices 0,, and Q are arranged in series with the source electrode s of Q,

(It is assumed in this and subsequent circuits that the input voltages are within the above described ranges required for operation of the devices in saturation and also that drain-tosource saturation leakage currents are negligible.) The voltage tracking constraint in this circuit requires that each device have a gate-to-source voltage of (e /2). This condition can be visualized by realizing that the total of the gate-to-source voltages of Q and O is e Since these gate-to-source voltages must be equal, they must each be e /2). As indicated in FIG. 3, the voltage at the source of Q must therefore equal e (e /2) so that all gate-to-source voltages equal (e 12).

In amplifier 40 of FIG. 4, the gate-to-source voltages must each equal e,. The indicated output voltages satisfy this condition. It is seen that the gate electrode of O is fixed at V,, so the source electrode of must be at a voltage V,, e,.

FIGS. 5 through illustrate embodiments of the invention which utilize four FET devices having substantially identical operating characteristics. In each case input terminals are coupled to the gate electrodes of two of the devices. The other two devices have their gate electrodes coupled to their drain electrodes. The voltages which are applied to the input terminals have been given the same numerical designations as the devices to which they are applied. For example, in FIG. 5, input voltages designated e and e, are applied to devices Q, and Q.,, respectively. Each of the FIGS. 5-10 indicate the voltages which appear at the possible output terminals.

It will be appreciated that additional devices can be connected in the manner disclosed to obtain various other difference voltage outputs. For example, with a five device series arrangement an output is available which is equal to one of the inputs minus four times the other input. In a practical sense, however, the number of devices in an arrangement is limited by the buildup of threshold voltages which necessitate the use of increasingly higher bias voltages for longer arrangements.

What is claimed is:

l. A voltage difference amplifier comprising:

a. first, second and third field-effect devices having substantially identical operating characteristics, each of said devices having drain, source and gate electrodes, said devices being connected in a series arrangement with the source electrode of each device coupled to the drain electrode of the next device in the arrangement, said series arrangement having a source end and a drain end, the first device being at the source end of the series arrangement, the second device being at the drain end of the series arrangement and the third device having its gate electrode coupled to its drain electrode;

b. first and second input terminals coupled to the gate electrodes of said first and second devices;

c. means for applying a bias voltage between the drain and source ends of said series arrangement; and

d. an output terminal coupled to the drain electrode of the first device.

2. The voltage difference amplifier as defined by claim I further comprising means for applying first and second input voltages to said first and second input terminals, said input voltages being of sufficient magnitude such that said first and second devices operate in their saturation regions whereby the voltage at said output terminal is substantially equal to said second input voltage minus twice said first input voltage.

3. The voltage difference amplifier as defined by claim 2 wherein said field-effect devices are substantially identical MOS field transistors.

4. A voltage difference amplifier comprising:

a. first, second and third field-effect devices having substantially identical operating characteristics, each of said devices having drain, source and gate electrodes, said devices being connected in a series arrangement with the source electrode of each device coupled to the drain electrode of the next device in the arrangement, said series arrangement having a source end and a drain end, the first device being in the middle of the series arrangement, said second device is at the drain end of said series arrangement, and the third device having its gate electrode coupled to its drain electrode;

b. first and second input terminals coupled to the gate electrodes of said first and second devices;

c. means for applying a bias voltage between the drain and source ends of said series arrangement; and

d. an output terminal coupled to the drain electrode of the first device.

5. The voltage difference amplifier as defined by claim 4 further comprising means for applying first and second input voltages to said first and second input terminals, said input voltages being of sufficient magnitude such that said first and second devices operate in their saturation regions whereby the voltage at said output terminal is substantially equal to said second input voltage minus half said first input voltage.

6. The voltage difference amplifier as defined by claim 5 wherein said field-effect devices are substantially identical MOS field effect transistors. 

1. A voltage difference amplifier comprising: a. first, second and third field-effect devices having substantially identical operating characteristics, each of said devices having drain, source and gate electrodes, said devices being connected in a series arrangement with the source electrode of each device coupled to the drain electrode of the next device in the arrangement, said series arrangement having a source end and a drain end, the first device being at the source end of the series arrangement, the second device being at the drain end of the series arrangement and the third device having its gate electrode coupled to its drain electrode; b. first and second input terminals coupled to the gate electrodes of said first and second devices; c. means for applying a bias voltage between the drain and source ends of said series arrangement; and d. an output terminal coupled to the drain electrode of the first device.
 2. The voltage difference amplifier as defined by claim 1 further comprising means for applying first and second input voltages to said first and second input terminals, said input voltages being of sufficient magnitude such that said first and second devices operate in their saturation regions whereby the voltage at said output terminal is substantially equal to said second input voltage minus twice said first input voltage.
 3. The voltage difference amplifier as defined by claim 2 wherein said field-effect devices are substantially identical MOS field transistors.
 4. A voltage differenCe amplifier comprising: a. first, second and third field-effect devices having substantially identical operating characteristics, each of said devices having drain, source and gate electrodes, said devices being connected in a series arrangement with the source electrode of each device coupled to the drain electrode of the next device in the arrangement, said series arrangement having a source end and a drain end, the first device being in the middle of the series arrangement, said second device is at the drain end of said series arrangement, and the third device having its gate electrode coupled to its drain electrode; b. first and second input terminals coupled to the gate electrodes of said first and second devices; c. means for applying a bias voltage between the drain and source ends of said series arrangement; and d. an output terminal coupled to the drain electrode of the first device.
 5. The voltage difference amplifier as defined by claim 4 further comprising means for applying first and second input voltages to said first and second input terminals, said input voltages being of sufficient magnitude such that said first and second devices operate in their saturation regions whereby the voltage at said output terminal is substantially equal to said second input voltage minus half said first input voltage.
 6. The voltage difference amplifier as defined by claim 5 wherein said field-effect devices are substantially identical MOS field effect transistors. 